Explore the architecture of Microprocessor 8085 with this quiz, focusing on hardware interrupts, register functions, clock speeds, and interrupt handling. Assess your understanding of the 8085 microprocessor's specific functionalities and prepare for advanced learning in microprocessor technology.
Interrupt Request Register
In-Service Register
Priority resolver
Interrupt Mask Register
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Don't care
Serial I/O
Masking 7.5
Clearing D F/F Associated with RST 7.5
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8085 - 3 Mhz, 8086 - 10 Mhz
8085 - 3 Mhz , 8086 - 5,8 Mhz
None of the Options
8085 - 3 Mhz , 8086 - 5,8, 10 Mhz
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Non maskabale Interrupt
IO Interfacing
DMA Request
Interrupt in Power Failure
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0A H
0B H
0C H
0D H
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5,8
5,7
5,9
5,6
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3,4
0-3,4
2,4
3,3
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INTR
TRAP
RST 7.5
RST 6.5
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6 to 10
31 to 35
6 to 12
5 to 9
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1
2
3
None of the Options
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0A H
0B H
0C H
0D H
Maskable
Maskable , Hardwired
Maskable , Hardwired, Vectored
Maskable , Hardwired, Vectored, Level Sensitive
Because to avoid trigeering by only level
To avoid false triggering because of noise
To avoid false triggering
None of the Options
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1
2
3
4
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RST 6.5, RST 5.5 , TRAP
RST 6.5, RST 7.5
RST 6.5 and RST 5.5
TRAP
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Hence supports word length of 16 bit
Because it has 16 bit data bus
Because it has word length of 8 and data bus of 16 bit
None of the Options
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10 H
20 H
30 H
40 H
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It has EU and BIU separately
It supports MIN and MAX mode
BIU supports pre fetching
It is 16 bit microprocessor
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5
4
2
3
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Yes by software
Yes by Hardwire
No
Yes by Softwire and Hardwire
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None for 8085
TRAP
All except TRAP
INTR
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5
4
12
None of the Options
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