Digital System Design (Mc1406) Quiz 2
Questions and Answers
- 1.
Express the decimal number –37 as an 8-bit number in sign-magnitude.
- A.
10100101
- B.
00100101
- C.
11011000
- D.
11010001
Correct Answer
A. 10100101Explanation
The given answer, 10100101, represents the decimal number -37 in sign-magnitude format. In sign-magnitude representation, the leftmost bit is the sign bit, where 0 indicates a positive number and 1 indicates a negative number. In this case, the sign bit is 1, indicating a negative number. The remaining 7 bits represent the magnitude of the number, which is 37 in binary. Hence, the correct answer is 10100101.Rate this question:
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- 2.
Derive the Boolean expression for the logic circuit shown below: Which one do you like?
- A.
C(A+B)DE
- B.
[C(A+B)D+E
- C.
[[C(A+B)D]E]
- D.
ABCDE
Correct Answer
A. C(A+B)DEExplanation
The correct answer is C(A+B)DE. This expression represents a logic circuit where the inputs C, A, B, D, and E are combined using the logical AND and OR operations. The expression C(A+B)DE means that the output is true if and only if C is true and either A or B is true, and D and E are also true. This can be represented by the following Boolean expression: (C AND (A OR B) AND D AND E).Rate this question:
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- 3.
If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?
- A.
1
- B.
2
- C.
7
- D.
8
Correct Answer
A. 1Explanation
In a 3-input NOR gate, the output is only HIGH when all of the inputs are LOW. Since there are 8 input possibilities, only 1 possibility will result in a HIGH output, which is when all three inputs are LOW.Rate this question:
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- 4.
Convert the binary number 1001.00102 to decimal
- A.
90.125
- B.
9.125
- C.
125
- D.
12.5
Correct Answer
B. 9.125Explanation
To convert a binary number to decimal, we need to multiply each digit by the corresponding power of 2 and sum them up. In this case, the binary number 1001.0010 has a 1 in the 2^3 (8), 2^0 (1), and 2^-3 (0.125) positions. Adding these values together, we get 8 + 1 + 0.125 = 9.125. Therefore, the correct answer is 9.125.Rate this question:
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- 5.
What is the function of an enable input on a multiplexer chip?
- A.
to apply V<sub style="box-sizing:border-box">cc
- B.
To connect ground
- C.
To active the entire chip
- D.
To active one half of the chip
Correct Answer
C. To active the entire chipExplanation
The enable input on a multiplexer chip is used to activate or enable the entire chip. When the enable input is high, the chip is enabled and can perform its intended function. This allows the chip to receive and process input signals, select the desired input channel, and produce the corresponding output. Without the enable input, the chip would remain inactive and unable to function.Rate this question:
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- 6.
How many inputs are required for a 1-of-10 BCD decoder?
- A.
4
- B.
8
- C.
10
- D.
1
Correct Answer
A. 4Explanation
A 1-of-10 BCD decoder is used to convert a binary-coded decimal (BCD) input into a corresponding decimal output. In this case, the decoder is designed to have 10 possible outputs, representing the decimal numbers 0 to 9. To achieve this, the decoder requires 4 inputs, as there are 10 possible combinations of 4 binary inputs (2^4 = 16), with 6 of them unused. Therefore, 4 inputs are needed for a 1-of-10 BCD decoder.Rate this question:
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- 7.
Select the statement that best describes the parity method of error detection.
- A.
Parity checking is best suited for detecting double bit errors that occur during the transmission of codes from one location to another
- B.
Parity checking is not suitable for detecting single bit errors in transmitted codes.
- C.
Parity checking is best suitable for detecting single bit errors in transmitted codes.
- D.
Parity checking is capable of detecting and correcting errors in transmitted codes.
Correct Answer
C. Parity checking is best suitable for detecting single bit errors in transmitted codes.Explanation
Parity checking is a method of error detection that involves adding an extra bit to a transmitted code. This extra bit, known as the parity bit, is set to either 0 or 1 depending on the number of 1s in the code. If the number of 1s is even, the parity bit is set to 0, and if the number of 1s is odd, the parity bit is set to 1. By checking the parity bit at the receiver's end, it is possible to detect single bit errors in the transmitted code. Therefore, the statement "Parity checking is best suitable for detecting single bit errors in transmitted codes" accurately describes the parity method of error detection.Rate this question:
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- 8.
Which statement below best describes a Karnaugh map?
- A.
A Karnaugh map can be used to replace Boolean rules.
- B.
The Karnaugh map eliminates the need for using NAND and NOR gates.
- C.
Variable complements can be eliminated by using Karnaugh maps.
- D.
Karnaugh maps provide a cookbook approach to simplifying Boolean expressions.
Correct Answer
D. Karnaugh maps provide a cookbook approach to simplifying Boolean expressions.Explanation
A Karnaugh map is a graphical representation used to simplify Boolean expressions. It provides a systematic and step-by-step approach, similar to following a cookbook recipe, to simplify complex Boolean expressions. By using the Karnaugh map, the process of simplification becomes easier and more organized, allowing for a more efficient and accurate simplification of Boolean expressions.Rate this question:
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- 9.
Which of the examples below expresses the distributive law of Boolean algebra?
- A.
(A + B) + C = A + (B + C)
- B.
A(B + C) = AB + AC
- C.
A + (B + C) = AB + AC
- D.
A(BC) = (AB) + C
Correct Answer
B. A(B + C) = AB + ACExplanation
The correct answer is A(B + C) = AB + AC. This equation represents the distributive law of Boolean algebra, which states that the product of a term with the sum of two other terms is equal to the sum of the products of the term with each of the two other terms separately. In this case, A is being distributed to both B and C, resulting in AB + AC.Rate this question:
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- 10.
How many 2-input NOR gates does it take to produce a 2-input NAND gate?
- A.
1
- B.
2
- C.
3
- D.
4
Correct Answer
D. 4Explanation
To produce a 2-input NAND gate, we need to invert the outputs of two NOR gates and then connect them in series. Each NOR gate has two inputs, so we need a total of four NOR gates. The first two NOR gates will invert the inputs, and the next two NOR gates will connect the inverted outputs in series to produce the final 2-input NAND gate.Rate this question:
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Mar 21, 2023Quiz Edited by
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Feb 14, 2019Quiz Created by
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