# Digital Logic And Logic Families-a3

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| Written by Pratiksha Patil
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Pratiksha Patil
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Quizzes Created: 2 | Total Attempts: 210
Questions: 10 | Attempts: 86  Settings  Digital logic and logic families: Digital signals, combinational and sequential logic circuits, clock signals, Boolean algebra and logic gates. Integrated circuits and logic families: Logic Levels, Noise Immunity, Fan Out, Propagation Delay, TTL logic family CMOS Logic family, comparison with TTL family Flip flops: Set Reset(SR),Trigger(T), clocked F/Fs; Registers, decoders and encoders, Multiplexer and Demultiplexer, applications
04

• 1.

• 2.

### A(A + B) =

• A.

AB

• B.

1

• C.

(1 + AB)

• D.

A

D. A
Explanation
The given expression A(A + B) simplifies to AB because when we distribute A into the parentheses, we get A^2 + AB. However, since A multiplied by itself (A^2) is equal to A, the expression further simplifies to AB.

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• 3.

### TTL uses

• A.

Multi emitter transistor

• B.

Multi collector transistor

• C.

Multi base transistor

• D.

Multi emitter or multi collector transistor

A. Multi emitter transistor
Explanation
A multi-emitter transistor is a type of transistor that has multiple emitter terminals. This allows for multiple input signals to be applied to the transistor, which can be useful in certain applications such as amplifiers or logic circuits. The use of multiple emitter terminals increases the versatility and functionality of the transistor, making it a suitable choice for various electronic circuits.

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• 4.

### How many types of sequential circuits are?

• A.

2

• B.

3

• C.

4

• D.

5

A. 2
Explanation
There are two types of sequential circuits. The first type is the Synchronous Sequential Circuit, where the outputs depend on the current inputs as well as the past inputs. The second type is the Asynchronous Sequential Circuit, where the outputs depend only on the current inputs and not on the past inputs.

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• 5.

### What is the function of an enable input on a multiplexer chip?

• A.

To apply Vcc

• B.

To connect ground

• C.

To active the entire chip

• D.

To active one half of the chip

C. To active the entire chip
Explanation
The enable input on a multiplexer chip is used to activate the entire chip. When the enable input is high, the chip becomes operational and can perform its intended function. This input allows for control over when the chip is active and when it is not, providing flexibility in its usage. Without the enable input, the chip would be constantly active, which may not be desirable in certain applications.

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• 6.

### In a multiplexer the output depends on its

• A.

Data inputs

• B.

Select inputs

• C.

Select outputs

• D.

None of the Mentioned

B. Select inputs
Explanation
In a multiplexer, the output depends on the select inputs. The select inputs determine which data input is selected and routed to the output. The select inputs control the switching mechanism of the multiplexer, allowing the user to choose which input data to pass through to the output. Therefore, the correct answer is select inputs.

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• 7.

### How many two-input AND and OR gates are required to realize Y = CD+EF+G?

• A.

2, 2

• B.

2, 3

• C.

3, 3

• D.

None of the Mentioned

A. 2, 2
Explanation
To realize the expression Y = CD+EF+G, we need to break it down into smaller parts. The terms CD, EF, and G are combined using the OR operation. Therefore, we need an OR gate to combine these terms. Each term consists of two variables, so we need two-input OR gates. Since there are three terms, we need three two-input OR gates. Additionally, each term is made up of two variables, so we need two-input AND gates to combine these variables. Therefore, we need two two-input AND gates. Hence, the correct answer is 2, 2.

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• 8.

### Which of following are known as universal gates?

• A.

NAND & NOR

• B.

AND & OR

• C.

XOR & OR

• D.

None of the Mentioned

A. NAND & NOR
Explanation
NAND and NOR gates are known as universal gates because they can be used to implement any other type of logic gate. This means that any logical function can be expressed using only NAND or only NOR gates. This is possible because NAND and NOR gates have the ability to perform both the AND and NOT operations. By combining multiple NAND or NOR gates, any logical function can be created, making them universal gates.

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• 9.

### Completion of one full pattern is called a

• A.

Period

• B.

Cycle

• C.

Frame

• D.

Segment

B. Cycle
Explanation
A cycle refers to the completion of one full pattern. It signifies that a sequence or process has repeated itself and returned to its original starting point. In this context, "cycle" accurately describes the completion of one full pattern, making it the correct answer.

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• 10.

### Which of the following are Universal gates

• A.

NOR and NAND

• B.

NOT and NAND

• C.

NOR and NOT

• D.

NOR, NAND and NOT Back to top