COA CSE D: Quiz 2 assesses knowledge in computer architecture, focusing on instruction methods, assembly language, addressing modes, system architecture, and data storage. It is designed to test understanding of core concepts and their application in a 64-bit computing environment.
Zero
One
Two
Both C and D
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NAND
XOR
XNOR
AND
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2n + 2
2n
n + 2
None of the mentioned
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Effective address
Registry
Immediate address
None of the mentioned
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Absolute
Immediate
Indirect
Direct
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Registers
Accumulators
Push down stack
Cache
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1100 0011
1000 1010
1000 0011
1100 0111
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N
Z
V
C
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Adds the value of 45 to the address of R1 and stores 45 in that address
Adds 45 to the value of R1 and stores it in R1
Finds the memory location 45 and adds that content to that of R1
None of these
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A 3-address instruction format
A 2-address instruction format
A 1-address instruction format
A 0-address instruction format
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1100 0011
1100 0010
1000 0011
1100 0111
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Registers
Index addressing mode
Indirect addressing mode
Offset addressing mode
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The higher order byte of the word
The lower order byte of the word
Can’t say
None of the mentioned
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EA = 5+R1
EA = R1
EA = [R1]
EA = 5+[R1]
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Add R4,R3
Add R4,#3
Add R4,100(R1)
Add R3,(R1 + R2)
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4 Byte
8 Byte
12 Byte
16 Byte
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(1, c), (2, b), (3, a)
 (1, a), (2, c), (3, b)
(1, b), (2, c), (3, a)
(1, a), (2, b), (3, c)
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The higher order byte of the word
The lower order byte of the word
Can’t say
None of the mentioned
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Aligned
Unaligned
Byte Addressable
Memory words
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R0 = ABH and R1 = ABH
R0 = ABH and R1 = 00H
R0 = 00H and R1 = 00H
R0 = 00H and R1 = ABH
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Zero
Overflow
Zero and carry
Zero and negative
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EA
2B
A3
F5
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EF DC AB FE
BA EF FE CD
FE CD BA EF
EF BA CD FE
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