Sequential Circuit Basics Quiz

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| Questions: 15 | Updated: Apr 30, 2026
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1. De Morgan's theorem states that (A·B)' equals which expression?

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About This Quiz
Sequential Circuit Basics Quiz - Quiz

This Sequential Circuit Basics Quiz evaluates your understanding of fundamental logic gates and their applications in sequential circuits. You'll explore AND, OR, NOT, NAND, NOR, and XOR gates, along with flip-flops and state machines. Designed for college-level learners, this medium-difficulty assessment reinforces critical concepts in digital logic design and circuit... see morebehavior. see less

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2. A state machine with memory elements and combinational logic is an example of a ____ circuit.

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3. Which flip-flop type is most commonly used as a frequency divider in counter circuits?

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4. Which logic gate produces a 1 output only when all inputs are 1?

Explanation

An AND gate outputs a 1 only when all of its inputs are 1. This means that if any input is 0, the output will be 0. It effectively requires all conditions to be true for the output to be true, making it a fundamental gate in digital logic.

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5. What is the output of a NOT gate when the input is 0?

Explanation

A NOT gate, also known as an inverter, outputs the opposite value of its input. When the input is 0 (representing a low or false state), the NOT gate inverts this to produce an output of 1, indicating a high or true state. This fundamental behavior is key to digital logic circuits.

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6. A NAND gate is logically equivalent to which combination?

Explanation

A NAND gate produces a false output only when all its inputs are true. This behavior can be achieved by first performing an AND operation on the inputs and then applying a NOT operation to the result, thus inverting the output of the AND gate. This makes it logically equivalent to an AND followed by NOT.

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7. The XOR gate produces a 1 output when inputs are ____.

Explanation

An XOR gate, or exclusive OR gate, outputs a 1 when the inputs are different from each other. This means that if one input is 0 and the other is 1, the output will be 1. However, if both inputs are the same (either both 0 or both 1), the output will be 0.

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8. In a SR (Set-Reset) flip-flop, what happens when both S and R inputs are 1 simultaneously?

Explanation

When both S and R inputs of a SR flip-flop are 1 simultaneously, it creates a conflict as both setting and resetting actions are requested at the same time. This leads to an undefined state, making it impossible to determine a stable output, which could result in unpredictable behavior in the circuit.

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9. A D flip-flop captures and holds the input value on the ____ edge of the clock.

Explanation

A D flip-flop is a type of digital memory circuit that samples the input data (D) and stores it when the clock signal transitions from low to high, known as the rising edge. This ensures that the output reflects the input state at a specific moment, allowing for reliable data storage and synchronization in digital systems.

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10. Which gate is universal and can implement any logic function by itself?

Explanation

The NAND gate is considered universal because it can be used to create any other logic gate, including AND, OR, and NOT gates. By combining multiple NAND gates in various configurations, any logical function can be implemented, making it a fundamental building block in digital circuits.

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11. In Boolean algebra, the expression A + A' equals what?

Explanation

In Boolean algebra, the expression A + A' represents a logical OR operation between a variable A and its complement A'. Since one of them must be true (either A is true or A' is true), the result is always true, which is represented by 1. Thus, A + A' equals 1.

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12. A JK flip-flop toggles its output when both J and K inputs are ____.

Explanation

A JK flip-flop toggles its output when both J and K inputs are high (1). This condition causes the flip-flop to change its state: if it was previously set to 1, it will reset to 0, and vice versa. This toggling behavior is a key feature of JK flip-flops, enabling versatile binary state control.

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13. Which of the following best describes a sequential circuit?

Explanation

A sequential circuit is characterized by its ability to remember past states, meaning its output is influenced not only by the current inputs but also by the history of inputs. This memory aspect distinguishes it from combinational circuits, where outputs depend solely on current inputs.

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14. The truth table for a NOR gate shows output 1 only when ____.

Explanation

A NOR gate outputs 1 only when both of its inputs are 0. This is because the NOR operation is the negation of the OR operation; it produces a true output (1) only when there are no true inputs (0s). Thus, it effectively acts as an inverter for the OR function.

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15. In a T (Toggle) flip-flop, the output changes state when the T input is ____.

Explanation

In a T flip-flop, the output toggles between its two states (0 and 1) whenever the T input is high (1). This means that each time the T input receives a signal of 1, the flip-flop changes its output to the opposite state, allowing for binary counting and state changes in digital circuits.

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De Morgan's theorem states that (A·B)' equals which expression?
A state machine with memory elements and combinational logic is an...
Which flip-flop type is most commonly used as a frequency divider in...
Which logic gate produces a 1 output only when all inputs are 1?
What is the output of a NOT gate when the input is 0?
A NAND gate is logically equivalent to which combination?
The XOR gate produces a 1 output when inputs are ____.
In a SR (Set-Reset) flip-flop, what happens when both S and R inputs...
A D flip-flop captures and holds the input value on the ____ edge of...
Which gate is universal and can implement any logic function by...
In Boolean algebra, the expression A + A' equals what?
A JK flip-flop toggles its output when both J and K inputs are ____.
Which of the following best describes a sequential circuit?
The truth table for a NOR gate shows output 1 only when ____.
In a T (Toggle) flip-flop, the output changes state when the T input...
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