Digital Logic And Logic Families-a4
Digital logic and logic families: Digital signals, combinational and sequential logic circuits, clock signals, Boolean algebra and logic gates. Integrated circuits and logic families: Logic Levels, Noise Immunity, Fan Out, Propagation Delay, TTL logic family CMOS Logic family, comparison with TTL family Flip flops: Set Reset(SR),Trigger(T), clocked F/Fs; Registers, decoders and encoders, Multiplexer and Demultiplexer, applications
- 1.Explain : Noise Immunity
- 2.DeMorgan’s theorem states that
- A.
(AB)’ = A’ + B’
- B.
(A + B)’ = A’ * B
- C.
A’ + B’ = A’B’
- D.
None of the Mentioned
- 3.Which Configuration of TTL is preferred if FAN OUT is requirement
- A.
Standard output TTL
- B.
Totem pole
- C.
Open Collector TTL
- D.
Tri state TTL
- 4.In D flip-flop, D stands for
- A.
Data
- B.
Delay
- C.
Both Delay and Data
- D.
None of the Mentioned
- 5.Why is a demultiplexer called a data distributor?
- A.
The input will be distributed to one of the outputs
- B.
One of the inputs will be selected for the output
- C.
The output will be distributed to one of the inputs
- D.
None of the Mentioned
- 6.A universal logic gate is one which can be used to generate any logic function. Which of the following is a universal logic gate? a) OR b) AND c) XOR d) NAND
- A.
OR
- B.
AND
- C.
XOR
- D.
NAND
- 7.How many truth table entries are necessary for a four-input circuit?
- A.
4
- B.
8
- C.
12
- D.
16
- 8.All continuous signals are analog in nature but all analog signals can be
- A.
Only continuous
- B.
Continuous or discrete
- C.
Only discrete
- D.
Digital
- 9.In 1-to-4 demultiplexer, how many select lines are required?
- A.
2
- B.
3
- C.
4
- D.
5
- 10.How many NAND gates are require to implement OR gate
- A.
2
- B.
3
- C.
1
- D.
4
Questions: 10 | Attempts: 47 | Last updated: Mar 20, 2022
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Sample QuestionIs [your statement here] true or false?
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Sample QuestionAccording to boolean law: A + 1 = ?
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