Microprocessors 2(TTA)
INSTRUCTIONS
1. NUMBER OF QUESTIONS 25
2. HAS A TIME LIMIT OF 15 MINUTES
3. HAS A PASS MARKS OF 30%
4. QUESTIONS PER PAGE 1
5. EACH QUESTIONS HAS 1 MARKS
6. NEGATIVE MARKING FOR EACH QUESTIONS IS 0.25
7. WILL ALLOW TO YOU GO BACK ,SKIP AND CHANGE YOUR ANSWERS
8. WILL ALLOW TO YOU PRINT OUT YOUR RESULT AND CERTIFICATE
9. WILL ALLOW TO YOU PRINT OUT YOURS RESPONSE SHEET WITH CORRECT ANSWER KEY AND EXPLANATION
10. WE WILL PROVIDE YOURS RESULT,CERTIFICATE AND YOUR RESPONSE SHEET TO YOURS EMAIL ID AT END OF ONLINE TEST
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- 1.
What is RST for the TRAP
- A.
RST 5.5
- B.
RST 4.5
- C.
RST 4
- D.
RST 5
Correct Answer
B. RST 4.5 -
- 2.
Which of the following is a hardware interrupt
- A.
RST 5.5,TST 6.5,RST 7.5
- B.
INTR,TRAP
- C.
TRAP
- D.
ALL
Correct Answer
D. ALL -
- 3.
What are level triggering interrupts
- A.
RST 6.5 AND RST 5.5
- B.
RST 7.5 AND RST 6.5
- C.
RST 5.5 AND RST 7.5
- D.
INTR and TRAP
Correct Answer
A. RST 6.5 AND RST 5.5 -
- 4.
. What is SIM
- A.
Select interrupt mask
- B.
Sorting interrupt mask
- C.
Set interrupt mask
- D.
Softer interrupt mask
Correct Answer
C. Set interrupt mask -
- 5.
Whai is software interrupt?
- A.
RST 0-7
- B.
RST 5.5
- C.
INTR
- D.
TRAP
Correct Answer
A. RST 0-7 -
- 6.
Which stack in 8085?
- A.
FIFO
- B.
LIFO
- C.
FILO
- D.
LILO
Correct Answer
B. LIFO -
- 7.
RIM is used to check whether??..?
- A.
The write operation is done or not
- B.
The interrupt is masked or not
- C.
The read operation is done or not
- D.
ALL
Correct Answer
B. The interrupt is masked or not -
- 8.
In 8085,example of non maskable interrupts are
- A.
TRAP
- B.
RST 6.5
- C.
INTR
- D.
RST 5.5
Correct Answer
A. TRAP -
- 9.
What does mp speed depends on
- A.
Clock
- B.
Data bus width
- C.
address bus width
- D.
Size of register
Correct Answer
C. address bus width -
- 10.
Can ROM be used as stack?
- A.
Yes
- B.
No
- C.
Some times yes
- D.
Some times no
Correct Answer
B. No -
- 11.
Which Processor structure is pipelined ?
- A.
all x80 processor
- B.
All x85 processor
- C.
all X86processor
- D.
Pentium
Correct Answer
C. all X86processor -
- 12.
.Address line for RST 3 is
- A.
0020H
- B.
0020H
- C.
0018H
- D.
0038H
Correct Answer
C. 0018H -
- 13.
In 8086 the overflow flag is set when
- A.
The sum is more than 16 bit
- B.
Single digit numbers go out of their range after an arithmetic operation
- C.
Carry&Sign flag are set
- D.
Zero flag is set
Correct Answer
B. Single digit numbers go out of their range after an arithmetic operation -
- 14.
The advantage of memory mapped i/o over i/o mapped i/o is
- A.
Faster
- B.
Many instructions supporting memory mapped i/o
- C.
Require a bigger address decoder
- D.
ALL OF ABOVE
Correct Answer
D. ALL OF ABOVE -
- 15.
BHE of 8086 microprocessor signal is used to interface the
- A.
even bank memory
- B.
Odd bank memory
- C.
I/O
- D.
DMA
Correct Answer
B. Odd bank memory -
- 16.
In 8086 the following has the highest priority among all interrupts
- A.
NMI
- B.
DIV 0
- C.
TYPE 255
- D.
OVER FLOW
Correct Answer
A. NMI -
- 17.
8088 differs 8086 in
- A.
Data width on the output
- B.
supports of co processor
- C.
address capability
- D.
Supports of max/min code
Correct Answer
A. Data width on the output -
- 18.
Address line for TRAP is
- A.
0023H
- B.
0024H
- C.
0033H
- D.
0034H
Correct Answer
B. 0024H -
- 19.
What is meant by Mask able interrupts?
- A.
An interrupt which can never turned off
- B.
An interrupt that can be turned off by the programmer
- C.
Both
- D.
None
Correct Answer
B. An interrupt that can be turned off by the programmer -
- 20.
In 8086, Example for Non mask able interrupts are
- A.
TRAP
- B.
RST 6.5
- C.
INTR
- D.
RST 5.5
Correct Answer
A. TRAP -
- 21.
IN 8086 microprocessor one of the following statements is not true
- A.
Coprocessor is interfaced in MAX mode
- B.
Coprocessor is interfaced in MIN mode
- C.
I/O can be interfaced in MAX/MIN mode
- D.
Supports pipe lining
Correct Answer
B. Coprocessor is interfaced in MIN mode -
- 22.
Why 8085 processor is called an 8 bit processor?
- A.
Because it has 8 bit ALU
- B.
Because it has 8 bit data bus
- C.
Both
- D.
None
Correct Answer
A. Because it has 8 bit ALU -
- 23.
Which interrupt is not level sensitive in 8085 ?
- A.
RST 6.5 is a raising edge-triggering interrupt
- B.
RST 7.5 is raising edge-triggering interrupt
- C.
Both
- D.
None
Correct Answer
B. RST 7.5 is raising edge-triggering interrupt -
- 24.
Access time is faster for
- A.
ROM
- B.
SRAM
- C.
DRAM
- D.
EPROM
Correct Answer
B. SRAM -
- 25.
Which is non vector interrupt
- A.
INTR
- B.
TRAP
- C.
RST7.5
- D.
RST6.5
Correct Answer
A. INTR -
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Aug 05, 2016Quiz Edited by
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