MICROPROCESSORS 2(TTA)

1. In 8086, Example for Non mask able interrupts are

TRAP

RST 6.5

INTR

RST 5.5

2. . What is SIM

Select interrupt mask

Sorting interrupt mask

Set interrupt mask

Softer interrupt mask

3. In 8085,example of non maskable interrupts are

TRAP

RST 6.5

INTR

RST 5.5

4. Which stack in 8085?

FIFO

LIFO

FILO

LILO

5. Whai is software interrupt?

RST 0-7

RST 5.5

INTR

TRAP

6. Address line for TRAP is

0023H

0024H

0033H

0034H

7. What is meant by Mask able interrupts?

An interrupt which can never turned off

An interrupt that can be turned off by the programmer

Both

None

8. Which is non vector interrupt

INTR

TRAP

RST7.5

RST6.5

9. Which of the following is a hardware interrupt

RST 5.5,TST 6.5,RST 7.5

INTR,TRAP

TRAP

ALL

10. .Address line for RST 3 is

0020H

0018H

0038H

11. Can ROM be used as stack?

Yes

No

Some times yes

Some times no

12. What is RST for the TRAP

RST 5.5

RST 4.5

RST 4

RST 5

13. Which Processor structure is pipelined ?

All x80 processor

All x85 processor

All X86processor

Pentium

14. In 8086 the following has the highest priority among all interrupts

NMI

DIV 0

TYPE 255

OVER FLOW

15. What are level triggering interrupts

RST 6.5 AND RST 5.5

RST 7.5 AND RST 6.5

RST 5.5 AND RST 7.5

INTR and TRAP

16. Which interrupt is not level sensitive in 8085 ?

RST 6.5 is a raising edge-triggering interrupt

RST 7.5 is raising edge-triggering interrupt

Both

None

17. The advantage of memory mapped i/o over i/o mapped i/o is

Faster

Many instructions supporting memory mapped i/o

Require a bigger address decoder

ALL OF ABOVE

18. Access time is faster for

ROM

SRAM

DRAM

EPROM

19. RIM is used to check whether??..?

The write operation is done or not

The interrupt is masked or not

The read operation is done or not

ALL

20. In 8086 the overflow flag is set when

The sum is more than 16 bit

Single digit numbers go out of their range after an arithmetic operation

Carry&Sign flag are set

Zero flag is set

21. IN 8086 microprocessor one of the following statements is not true

Coprocessor is interfaced in MAX mode

Coprocessor is interfaced in MIN mode

I/O can be interfaced in MAX/MIN mode

Supports pipe lining

22. 8088 differs 8086 in

Data width on the output

Supports of co processor

Address capability

Supports of max/min code

23. BHE of 8086 microprocessor signal is used to interface the

Even bank memory

Odd bank memory

I/O

DMA

24. What does mp speed depends on

Clock

Data bus width

Address bus width

Size of register

25. Why 8085 processor is called an 8 bit processor?

Because it has 8 bit ALU

Because it has 8 bit data bus

Both

None

Microprocessors 2(TTA)

1. In 8086, Example for Non mask able interrupts are

2.

What first name or nickname would you like us to use?

2. . What is SIM

3. In 8085,example of non maskable interrupts are

4. Which stack in 8085?

5. Whai is software interrupt?

6. Address line for TRAP is

7. What is meant by Mask able interrupts?

8. Which is non vector interrupt

9. Which of the following is a hardware interrupt

10. .Address line for RST 3 is

11. Can ROM be used as stack?

12. What is RST for the TRAP

13. Which Processor structure is pipelined ?

14. In 8086 the following has the highest priority among all interrupts

15. What are level triggering interrupts

16. Which interrupt is not level sensitive in 8085 ?

17. The advantage of memory mapped i/o over i/o mapped i/o is

18. Access time is faster for

19. RIM is used to check whether??..?

20. In 8086 the overflow flag is set when

21. IN 8086 microprocessor one of the following statements is not true

22. 8088 differs 8086 in

23. BHE of 8086 microprocessor signal is used to interface the

24. What does mp speed depends on

25. Why 8085 processor is called an 8 bit processor?