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The correct answer is option 3. The process control block (PCB) contains the identifier, state, priority, program counter, memory pointers, context data, I/O status, and computational information. These are all essential components for managing and controlling a process in an operating system.

The correct answer is "otkrivanje dve i ispravljanje jedne greske" which translates to "detecting two and correcting one error" in English. This suggests that dram memory uses Hamming code to detect and correct errors in data. Hamming code is an error-correction code that can detect and correct single-bit errors, making it suitable for use in memory systems where data integrity is crucial.

RAID 5 is the correct answer because it is a type of RAID configuration that distributes parity across all disks in the array. It uses striping with distributed parity, which means that the data and parity information are spread across multiple disks. This configuration provides both data striping and redundancy, allowing for improved performance and fault tolerance. RAID 5 is commonly used in network servers to provide a balance between performance, storage capacity, and data protection.

The correct answer is "Sa fragmenacijom i kod din i fiksne". This means that memory allocation in partitions can lead to fragmentation in both dynamic and fixed partitions. This suggests that regardless of the type of partition used, there is a possibility of fragmentation occurring during the memory allocation process.

The correct answer is "adresu instukcije koja treba da se pribavi". A program counter (PC) is a register in a computer processor that holds the memory address of the next instruction to be executed. It keeps track of the current position in the program's sequence of instructions. Therefore, it contains the address of the instruction that needs to be fetched next.

When loading a new page from the disk into the RAM, sometimes it is necessary to replace an existing page. This means that there may not be enough space in the RAM to hold all the pages needed for the new page, so one of the existing pages must be swapped out and replaced with the new page. This is done to ensure efficient memory management and optimize the usage of available RAM space.

The correct answer is "Interaktivni, paketni, jednoprogramski i viseprogramski." This answer correctly identifies the different types of operating systems. An interactive operating system allows for user interaction and input. A batch operating system executes jobs in batches without user interaction. A single-program operating system allows for the execution of only one program at a time. A multi-program operating system allows for the execution of multiple programs simultaneously.

The correct answer is "Menjaju sadržaj programskog brojača." This answer is correct because operations for controlling the flow of a program often involve changing the value of the program counter. The program counter is a register that keeps track of the memory address of the next instruction to be executed. By modifying the program counter, the control flow of the program can be altered, allowing for branching, looping, and other control structures.

The correct answer is "Skupo i do neke vel. brze". This answer suggests that the quality or value of something is expensive but it is faster up to a certain size. This implies that although it may be costly, it provides a faster outcome within a specific range or limit.

The correct answer is option 4. This is because the given inequality (2^k)-1>=M+K represents the condition for the length of syndrome k. The length of syndrome k should be greater than or equal to M+K. Therefore, option 4 is the correct answer.

The correct answer is "donosi instrukciju na koju ukazuje PC i povecava sadrzaj programskog brojaca za 1". During the instruction fetch phase, the processor increases the content of the program counter (PC) by 1 and brings the instruction pointed by the PC into the processor. This process allows the processor to fetch the next instruction in the program sequence.

The concept of virtual memory is based on the idea that only a portion of the program and data is stored in the main memory, while the rest is stored in secondary memory. This allows for efficient memory management, as the limited space in the main memory can be used more effectively by swapping data between the main memory and the secondary memory as needed. By utilizing virtual memory, the system can effectively handle larger programs and data sets than what can fit entirely in the main memory.

The given equation Ta = Ts+Tr+Tp represents the total access time, which is calculated by adding the average positioning time (Ts), twice the average delay time (Tr), and the transmission time (Tp). This equation accounts for the time it takes to position the data, the delay in accessing the data, and the time it takes to transmit the data. Therefore, option 4 correctly represents the total access time.

The correct answer suggests that most future accesses by the processor to the main memory will be to locations that have been recently accessed. This aligns with the principle of locality, which states that memory accesses tend to cluster in time and space. The processor is likely to access locations that have been recently accessed because of temporal locality, meaning that recently accessed locations are more likely to be accessed again in the near future.

The correct answer suggests that when writing to main memory (RAM), the data is simultaneously stored in both the cache and RAM. Additionally, it states that the data is also buffered in RAM. However, when a block in RAM is modified, it is only stored in the cache.

The correct answer is "prenos podatka ram-cpu, aritmeticko-logicke, upravljanje programom, ui prenos." This is because the given options are divided into different categories of machine instructions, and the correct answer includes all the categories mentioned in the options. These categories are: data transfer between RAM and CPU, arithmetic and logical operations, program control, and user interface data transfer.

The correct answer is option 4 because it states that DRAM is used for writing and reading, while SRAM is only used for reading. This aligns with the given information that RAM memory can be both DRAM and SRAM, and the option correctly identifies the functions of each type of memory.

The correct answer is "sekvencijalan, direktan, slucajan i asocijativan". This is because the question is asking for the possible methods of access, and the answer lists four different methods: sekvencijalan (sequential), direktan (direct), slucajan (random), and asocijativan (associative). These methods represent different ways in which data can be accessed in a system or a database.

Kes memorija sluzi da zadrzi kopije nekih nedavno koriscenih reci iz glavne memorije. This means that the cache memory is used to store copies of some recently used words from the main memory.

The correct answer is "lokalnu, sistemsku, magistralu velike brzine i magistralu za prosirenje". This answer suggests that high-performance architecture includes a local bus, a system bus, a high-speed bus, and an expansion bus. These buses are essential components of a high-performance architecture as they facilitate the communication between different components of a computer system, allowing for efficient data transfer and processing.

When there is no interrupt technique, the CPU waits the entire time for the I/O operation to finish.

Disks with a glass substrate have improved surface uniformity, reduced surface defects, lower head flying height, and higher resistance to impacts/damage compared to disks with aluminum or plastic substrates.

The correct answer is "Izmedju kesa i RAM se prenose blokovi." This answer states that blocks are transferred between cache and RAM. This is a common practice in computer architecture, where the cache is used to store frequently accessed blocks of data from RAM, allowing for faster access times. By transferring blocks instead of individual words or frames, the cache can effectively store and retrieve larger chunks of data, improving overall performance.

This answer suggests that when a data is not in the cache, it is loaded from the main memory into the cache, and then from the cache into the CPU. This process involves transferring a block of data from the main memory to the cache, and then transferring the data from the cache to the CPU.

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The correct answer is "cpu, kes l1,l2, glavna memorija." This answer follows the hierarchy of internal memory, starting with the CPU, then the cache memory (kes l1,l2), and finally the main memory (glavna memorija). This order is logical as the CPU needs to access the cache memory for faster data retrieval before accessing the main memory.

The correct answer is "uvek ista glava" (always the same head). This means that the same head is used for both writing and reading.

Addressing with displacement can be done in three ways: relative, indexed, and base. Therefore, the correct answer is "relativno, indeksno, bazno" which means relative, indexed, and base addressing.

When a data is not present in the cache, it is loaded from the main memory into the cache. In this case, the correct answer is "blok iz glavne memorije u kes" which translates to "block from main memory to cache". This means that when a requested data is not found in the cache, a block of data containing that requested data is loaded from the main memory into the cache.

The correct answer is option 4 because it mentions that Vincester disks are universal, cheap, the fastest external memory, and have increasing capacity. This aligns with the given characteristics of Vincester disks, which include being universal, cheap, the fastest external memory, and having increasing capacity.

Depending on the configuration, the data may or may not pass through the DMA. The DMA (Direct Memory Access) is a feature that allows data to be transferred between devices without involving the CPU. In some configurations, the data may be directly accessed from the bus by the destination device, bypassing the DMA. However, in other configurations, the data may need to pass through the DMA for the transfer. Therefore, the statement "Zavisno od konf. moze a ne mora da prolazi kroz DMA" (Depending on the configuration, it may or may not pass through the DMA) is the correct answer.

The correct answer is "sindrom neispravan ali nije potrebna ispravka podataka." This means that the syndrome is incorrect, but there is no need to correct the data.

Raid 1 is the correct answer because it involves mirroring the data onto multiple disks. In this configuration, the data is divided into stripes and each stripe is duplicated onto two separate disks. This provides redundancy, as if one disk fails, the data can still be accessed from the other disk. However, it is less efficient in terms of storage capacity compared to other RAID levels. The statement also mentions that rebuilding the data after a disk failure is expensive and simple, which aligns with the characteristics of RAID 1.

Implicit addressing refers to addressing modes where the operand is implicitly specified by the instruction itself, rather than explicitly specifying the memory location or register. In this case, the instruction "adresira" is implicitly addressing the variables in the CPU registers. Therefore, option 4, "promenljive u registrima cpu" is the correct answer.

Fragmentation occurs when files and data are scattered across different parts of a disk, leading to decreased performance and efficiency. The correct answer suggests that fragmentation problems can be resolved by merging or consolidating the fragments. By combining the scattered fragments into contiguous blocks, the disk can be organized more efficiently, improving access times and overall performance.

RAID 0 is the correct answer because it involves striping data across multiple disks without redundancy. This means that the data is divided into blocks and distributed evenly across all the disks in the RAID array, which increases the speed of data access and retrieval. However, RAID 0 does not provide any fault tolerance or data redundancy, so if one disk fails, all the data in the array can be lost.

The correct answer explains that "Arhitektura racunara" refers to the attributes of a computer that are visible to the programmer, while "Organizacija racunara" refers to the way these attributes are implemented. This explanation clarifies the distinction between the two terms and their respective meanings.

The correct answer is "kod operacije" because a machine instruction must contain the code for the operation that needs to be performed. This code specifies the type of operation that the instruction represents, such as addition, subtraction, or multiplication. The instruction also typically includes additional information, such as the memory addresses or registers where the operands are located. However, the question does not specify any requirements for the operands, so it is not necessary for the instruction to have any operands.

The correct answer is "Budu veci od fiz memorije." The technique of overlapping allows programs to be larger than the physical memory available. This technique involves dividing the program into smaller segments and loading them into memory as needed, allowing the program to exceed the physical memory size. This is achieved by swapping segments in and out of memory, utilizing secondary storage such as a hard disk. By utilizing overlapping, programs can effectively utilize more memory than what is physically available.

The correct answer is "Minimizirati primenom stranicenja i segmentacije." This means that the problems with partition fragmentation can be minimized by implementing both paging and segmentation techniques. This suggests that using a combination of these two memory management techniques can help reduce fragmentation and improve overall system performance.

The continuous allocation of memory in partitions is typical for old operating systems. This means that in these systems, memory is divided into fixed-sized partitions and each process is allocated a specific partition for its execution. This method was commonly used in early operating systems but has been replaced by more efficient memory allocation techniques in modern systems.

The given statement suggests that the processor is not being utilized effectively in package processing. This implies that the processor is not being fully utilized or is not performing efficiently in handling package processing tasks. Therefore, the correct answer is "procesor."

The correct answer is option 4 because arbitiranje na magistrali (bus arbitration) can be both centralized and distributed. In a centralized arbitration scheme, there is a single bus arbiter that controls the access to the bus. On the other hand, in a distributed arbitration scheme, multiple devices have the capability to arbitrate for bus access. Therefore, the correct answer is that bus arbitration can be both centralized and distributed, depending on the system design.

The operation "AND" with the desired bits sets them to 0 and does not change the rest of the bits.

The correct answer is that the operation NOT selectively inverts all bits. This means that it will invert the desired bits and leave the rest unchanged. It will not set all bits to 0, as stated in option 3.

The correct answer is "Na kraju svakog instr. seta." This means that the CPU interrupt signal is checked at the end of each instruction set. This is important because the CPU needs to be able to handle interrupts from external devices or events that may require immediate attention and interrupt the normal execution of the program. By checking for interrupts at the end of each instruction set, the CPU can ensure that it can respond to these interrupts in a timely manner.

The correct answer is "Vremenska i prostorna za instrukcije i podatke." This means that the locality of reference refers to both the temporal (time-related) and spatial (location-related) aspects of instructions and data in a computer system. In other words, it encompasses both the time and location of where instructions and data are accessed and used within the system.

The correct answer is "direktno, asocijativno i asocijativno preslikavanje skupa". The statement "koriste se tehnike preslikavanja ram-kes" suggests that caching techniques are being used. The options provided include different combinations of direct mapping (direktno preslikavanje), associative mapping (asocijativno preslikavanje), and set associative mapping (asocijativno preslikavanje skupa). The correct answer includes all three techniques, indicating that a combination of these caching techniques is being used.

The correct answer is "objedinjen za instrukcije i podatke" (option 3). This means that both previous solutions are used. In computer architecture, there are two main approaches to organizing memory: separate instruction and data memory, and unified memory. The unified memory approach combines instruction and data memory into a single memory unit. This allows for more efficient use of memory space and simplifies the memory management process. Therefore, option 3 is the correct answer as it states that both previous solutions are used.

The correct answer is "Procesa". The question is asking what the monitor is responsible for. In this context, the term "monitor" is likely referring to a computer monitor, which is a display device. A computer monitor is not responsible for scheduling memory or peripheral devices. However, it is responsible for displaying the processes running on the computer, hence the correct answer being "Procesa".

The correct answer is "specijalni hardver MMU". MMU stands for Memory Management Unit, which is a special hardware component responsible for translating virtual addresses into physical addresses. The MMU is typically part of the CPU and is controlled by the operating system. It helps in managing memory and enables the efficient use of virtual memory by mapping virtual addresses to physical addresses in the computer's memory.

The correct answer is "Nov, spreman, izvrsavanje, ceka, zaustavljen" because it includes all the possible states of a process: "Nov" (new), "spreman" (ready), "izvrsavanje" (running), "ceka" (waiting), and "zaustavljen" (stopped). The other options either miss one or more states or include additional states that are not mentioned in the given list.

Implicitno adresiranje adresira promenljive u registrima CPU. Implicitno adresiranje je način adresiranja u kojem se adresa operanda ne navodi eksplicitno, već se podrazumeva da se operand nalazi u registru CPU. Ovo znači da se vrednost promenljive direktno koristi iz registra, bez potrebe za eksplicitnim navođenjem adrese u memoriji. U ovom slučaju, implicitno adresiranje se koristi za adresiranje promenljivih koje su smeštene u registrima CPU.

The correct answer is "delom u kesu, delom u ram delom na disk". This means that the page table is partially stored in the cache, partially in the RAM, and partially on the disk. This is a common memory management technique used by operating systems to efficiently manage memory. The page table is used to keep track of the mapping between virtual memory addresses and physical memory addresses. Storing it in different levels of memory hierarchy allows for faster access to frequently used pages while still maintaining the ability to access less frequently used pages from the disk.

The correct answer is option 3. SRAM is a type of memory that is faster and more expensive than DRAM. It stores data in a static form using flip-flops, which makes it more stable and doesn't require constant refreshing like DRAM. On the other hand, DRAM is a type of memory that is slower and cheaper than SRAM. It stores data in a dynamic form using capacitors, which need to be constantly refreshed to maintain the data. Therefore, SRAM is more reliable and stable compared to DRAM.

The main goal of a time-sharing operating system is to minimize response time. This means that the operating system aims to provide quick and efficient responses to user requests and actions. By minimizing response time, the operating system can enhance user experience and improve overall system performance. This can be achieved through various techniques such as efficient scheduling algorithms, prioritizing interactive tasks, and optimizing resource allocation.

The correct answer is option 2. This is because it includes all the characteristics of memory mentioned in the question, such as location, capacity, data transfer unit, access method, performance, physical type, physical characteristics, and organization. Option 1 does not include the access method and performance, option 3 does not include the data transfer unit, and option 4 is not a valid option.

The given answer states that the numerical value of multiple bytes is stored in the most significant byte at the lowest numerical address. This is a common way of storing numerical values in computer systems, where the most significant bits are stored in the lowest memory addresses. This ensures that the value can be easily accessed and manipulated by the computer.

The correct answer is option 4: slozenije instrukcije, adresiranje vise registara, manje instrukcija u programu, veca fleksibilnost. This option states that the complex instructions, addressing multiple registers, fewer instructions in the program, and greater flexibility are the advantages of the given address. This means that using this address allows for more complex instructions, the ability to address multiple registers, a smaller number of instructions in the program, and greater flexibility in programming.

This answer correctly states that "blokira cip" (blocks the chip), "brojanje kroz redove" (counting through rows), "citanje i upisivanje unazad" (reading and writing backwards), "uzima vreme" (takes time), and "usporava rad" (slows down the work) are all effects of "osvezavanje sadrzaja" (content refresh).

The correct answer is "procesorom, memorijom, U/I, podacima". This answer correctly identifies the most important functions of an operating system, which include managing the processor, memory, input/output devices, and data. The operating system is responsible for coordinating and controlling these essential components to ensure the efficient operation of a computer system.

When a process is in a waiting state, it is waiting for either an input/output operation (U/I) or an event to occur. This means that the process is not actively using the processor and is temporarily suspended until it receives the required input/output or until the specified event takes place.

The correct answer states that "Direktno preslikavanje" (Direct mapping) is simple and inexpensive, the tag field is short, access is very fast, but the cache utilization is poor. This means that in direct mapping, each block of main memory can be mapped to only one specific cache line, which leads to a high risk of cache conflicts and lower cache utilization.

The correct answer is option 3: su sindrom i podatak ispravni. This means that both the syndrome and the data are correct, so no correction is needed.

The correct answer is "instrukcija koja treba da se izvrsi" because the registrar instruction (IR) typically contains the instruction that needs to be executed by the processor. It specifies the operation that needs to be performed by the CPU, such as arithmetic, logic, or data transfer operations. The IR holds the actual instruction that the processor needs to carry out, making it an essential component of the instruction execution process.

The correct formula for calculating the transfer time from/to the disk is given by dividing the number of bytes to be transferred by the product of the number of bytes per track and the rotation speed. This formula takes into account the number of bytes to be transferred, the density of data on the track, and the speed at which the disk is rotating. By dividing the number of bytes to be transferred by the product of the number of bytes per track and the rotation speed, we get the time it takes to transfer the data.

The correct answer is "dupliranjem resursa" because duplicating resources is a way to eliminate structural hazards. By duplicating resources, such as registers or functional units, multiple instructions can be executed simultaneously without causing structural hazards. This helps to ensure that the pipeline runs smoothly and efficiently, avoiding any delays or conflicts in resource usage.

Jednoprogramski sistemi trebaju obezbediti zaštitu dela memorije sa operativnim sistemom. Ova zaštita je važna kako bi se sprečilo da programi ili korisnici nenamerno ili zlonamerno pristupe ili menjaju delove memorije koji nisu namenjeni njima. Ova mera obezbeđuje integritet podataka i programa, što je ključno za sigurno i pouzdano izvršavanje jednoprogramskih sistema.

The correct answer is "Memorijsko: neposredno, direktno i indirektno; registarsko: implicitno, direktno i indirektno; adresiranje sa pomerajem". This answer accurately lists the basic addressing modes in computer architecture. It includes three memory addressing modes (neposredno, direktno, and indirektno) and three register addressing modes (implicitno, direktno, and indirektno), along with addressing with offset (adresiranje sa pomerajem).

The translation lookaside buffer (TLB) is a part of the page table in a computer's memory management unit. It is a special cache memory that stores recently used virtual-to-physical address translations. When a memory access is requested, the TLB is checked first to see if the translation is already available. If it is, the physical address is retrieved from the TLB, saving time compared to accessing the full page table. Therefore, option 4, "deo tabele stranica u specijalnoj kes memoriji" (part of the page table in a special cache memory), is the correct answer.

The correct answer is "baznog i indeksnog adresiranja". This is because in both bazno (base) and indeksno (index) addressing modes, a base address is used as a starting point and an offset or index value is added to it to calculate the final memory address. This allows for efficient memory access by referencing data elements using a combination of a base address and an offset or index.

Neposredno adresiranje adresira konstante u memoriji. This means that the instruction directly specifies the memory address where the constant value is stored, allowing the CPU to access and use that value in calculations or operations. This is different from addressing variables in memory or registers, where the instruction would specify the location of the variable rather than a constant value.

The correct answer is "bajt ili word u RAM-u a blok na disku." This is because an addressable unit refers to the smallest unit of memory that can be accessed and manipulated. In this case, it can be either a byte or a word in RAM. On the other hand, a block on the disk typically refers to a larger unit of data that is transferred between the disk and RAM, and it is usually larger than a byte or a word. Therefore, the addressable unit in RAM and the block on the disk can have different sizes.

The correct answer is "zavisi od sirine magistrale" which means "depends on the width of the bus". The width of the bus determines how much data can be transferred between the RAM and CPU at a time. A wider bus allows for more data to be transferred, resulting in faster data transfer between the RAM and CPU. Therefore, the unit of transfer between the internal memory (RAM) and CPU depends on the width of the bus.

Implicitno adresiranje se koristi kada se operand za instrukciju automatski određuje na osnovu konteksta ili prethodno definisanih pravila. Ovo znači da se adresa operand-a ne mora eksplicitno navesti u instrukciji. Umesto toga, adresa se dobija implicitno iz registra ili nekog drugog dela memorije. U ovom slučaju, implicitno adresiranje se koristi za adresiranje steka.

The correct answer is option 4, which states that page fault occurs when the CPU requests a page that is not in the RAM. This means that the required page is not currently available in the main memory and needs to be fetched from secondary storage, such as the hard disk. Page faults can cause a delay in the execution of the program as the CPU waits for the page to be loaded into RAM.

This answer suggests that it is possible to handle multiple interrupt requests by either disabling all interrupts except one correct one or by allowing one interrupt to interrupt another based on priority. Both approaches are valid and can be used to handle multiple interrupt requests simultaneously.

Indirektno adresiranje je spor način adresiranja jer zahtijeva dodatne korake kako bi se došlo do tražene adrese. Također, koristi se za povećanje adresnog prostora jer omogućava pristup više adresa putem jednog registra. Ova kombinacija sporog rada i povećanja adresnog prostora čini odgovor "sporo, povećava adresni prostor" ispravnim.

The correct answer is option 3: tastatura, modem, stampac, hdd, cd, gpu, gigabit eternet. This is the correct order of peripheral devices in ascending order of speed. The order starts with the slowest device, which is the keyboard (tastatura), followed by the modem, printer (stampac), hard disk drive (hdd), CD drive (cd), graphics processing unit (gpu), and finally gigabit ethernet.

The correct answer is option 4: magnetni disk, flush, tvrdi disk, mag traka.

The correct answer is that the syndrome is correct, but the data needs to be corrected. This means that there is a syndrome present, but there is an error in the data that needs to be fixed.

The given statement suggests that if there is a carry during the transmission, then C (carry) is equal to 1. This indicates that there is an overflow or a carry-out from the most significant bit in unsigned numbers. Therefore, the correct answer is "prekoracenje kod brojeva bez znaka" which means "overflow in unsigned numbers."

The correct answer is "smesta u jednobitne registre-zastavice." After executing an instruction, the result is stored in the one-bit flag registers. These flag registers are used to indicate the status of the processor after the execution of an instruction, such as whether a certain condition is met or not. Storing the result in these flag registers allows the processor to make decisions based on the outcome of the instruction execution.

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The physical address consists of the frame number and the offset. The frame number represents the memory frame where the data is stored, while the offset represents the specific location within that frame. This combination allows the system to locate and access the desired data in the physical memory.

The correct answer is "broja stanice". A virtual address consists of a page number and an offset. The page number represents the page or segment of memory that the address belongs to, while the offset represents the specific location within that page. The "broja stanice" refers to the page number component of the virtual address.

The correct answer is "broj adresa nacini adresiranja, repertoar operacija, pristup registrima, format instrukcije." This is because when designing machine instructions, it is important to consider the number of addresses required by the instruction, the different ways of addressing memory or registers, the repertoire of available operations, the access to registers, and the format of the instruction. All of these parameters play a crucial role in ensuring the efficiency and functionality of the machine instructions.

The correct answer is option 3, "manja je kod bezuslovnog grananja". This means that the penalty can be smaller in the case of unconditional branching.

The correct answer is that the width of the address bus depends on the memory capacity. This means that the number of address lines in the address bus is determined by the size of the memory being accessed. A larger memory capacity requires more address lines to access all the memory locations, while a smaller memory capacity requires fewer address lines. Therefore, the width of the address bus is directly related to the capacity of the memory.

The correct answer is "ceka vreme, ceka da se zavrsi U/I operacija". This is because in a case of long waiting for the CPU, the program does not interrupt because the peripheral is faster. Instead, it waits for the completion of input/output (U/I) operations. This implies that the program is paused and remains in a waiting state until the U/I operation is finished.

The given answer states that the most significant byte is stored at the highest numerical address. This is a characteristic of the little-endian byte order, where the least significant byte is stored at the lowest address and the most significant byte is stored at the highest address. This byte order is commonly used in computer systems and programming languages.

When a virtual address refers to a part of the program or data that is currently in physical memory (cache, main memory), it is accessed immediately using the respective physical address. This means that there is no need to transfer the part of the program or data from the disk, and the corresponding location is accessed directly using the corresponding physical address.