Daksh 2k17
.
- 1.
Write an Embedded-c code to copy a 6,7th bits of one register of content [45h] and obtain their two’s complement. [+5 0]
- 2.
Write an Embedded-c code to combine two contents [07h,09h] in the form of [79h] using logical operators [+5 0]
- 3.
In the given ASM code Spot the error and rectify it: Ldi R20,$00 Out ddrb,R20 l: In r23,Pinb Sbis r23,$07 Rjmp l nop [+3 0]
- 4.
Write a program to check whether the number is palindrome or not of a 4 digit and as well as 3 digit number using 8086 [5 marks]
- 5.
Which of the following instruction can used to toggle a bit of the port: [+1 0]
- A.
SBI
- B.
CBI
- C.
BOTH
- D.
NONE
Correct Answer
C. BOTH -
- 6.
RESET operation takes ________clock periods [+1 0]
- A.
10
- B.
9
- C.
12
- D.
13
Correct Answer
A. 10 -
- 7.
Cache uses ________type of memory [+1 0]
- A.
Magnetic
- B.
SRAM
- C.
DRAM
- D.
None
Correct Answer
A. Magnetic -
- 8.
.”XCH A,Rn” the instruction comes under the category of [+1 0]
- A.
Accumulator-specific transfer
- B.
General purpose
- C.
Both
- D.
None
Correct Answer
A. Accumulator-specific transfer -
- 9.
If first byte of data is stored in ________ address then 8086 can read the entire word in one operation. [+2 -1]
Correct Answer
Even,even,EVEN - 10.
The instructions that is not possible among the following is a) MOV AX, [BX] b) MOV AX, 5555Hc) MOV 55H,BL d) MOV [SI], [DI] [+1 0]
- A.
C and D
- B.
C and A
- C.
A and B
- D.
D and A
Correct Answer
A. C and D -
- 11.
Pick out the odd one [+1 0]
- A.
CLC
- B.
ESC
- C.
HLT
- D.
LOCK
Correct Answer
A. CLC -
- 12.
Which operation can be performed on control word register is [+1 0]
- A.
Write
- B.
Read
- C.
Both
Correct Answer
A. Write -
- 13.
A good assembly language programmer should use general purpose registers rather than memory in maximum possibleways for data processing. This is because: [+1 0]
- A.
Data processing with registers takes fewer cycles than that with memory
- B.
Of limited set of instructions for data processing with memory
- C.
Data processing with registers is easier than with memory
- D.
Data processing with memory requires more instructions in the program than that with registers
Correct Answer
A. Data processing with registers takes fewer cycles than that with memory -
- 14.
Which of the processor’s stack does not contain the top-down data structure? [+1 0]
- A.
8051
- B.
8086
- C.
80386
- D.
All
Correct Answer
A. 8051 -
- 15.
________ ensures that only one IC is active at a time to avoid a bus conflict caused by two ICs writing different data to the same bus [+1 0]
- A.
Adress decoder
- B.
Control bus
- C.
Cpu
- D.
Adress encoder
Correct Answer
A. Adress decoder -
- 16.
What are the sets of commands in a program which are not translated into machine instructions during assembly process, called? [+1 0]
- A.
Direcrtives
- B.
Identifiers
- C.
Mnemonics
- D.
Operands
Correct Answer
A. Direcrtives -
- 17.
The register that provides control and status information about counters is [+1 0]
- A.
TCON
- B.
TMOD
- C.
BOTH
- D.
NONE
Correct Answer
A. TCON -
- 18.
Number of addressing methods in 8051 [+1 0]
- A.
3
- B.
4
- C.
5
- D.
6
Correct Answer
C. 5 -
- 19.
What is the default value of stack pointer in 8051? [+1 0]
- A.
6
- B.
7
- C.
8
- D.
9
Correct Answer
B. 7 -
- 20.
In 8051,Trap flag is also called as [+1 0]
- A.
RST 5.5
- B.
RST4.5
- C.
RST 7.5
- D.
RST6.5
Correct Answer
A. RST 5.5 -
- 21.
NVRAM is also called as [+1 0]
- A.
Flash
- B.
Program
- C.
Data
- D.
None
Correct Answer
A. Flash -
- 22.
In AVR for spike free Brown-out Detection? [+1 0]
- A.
It has programmed and unprogrammed BODLEVEL
- B.
It has Hysteresis
- C.
BOTH
- D.
None of the Above
Correct Answer
C. BOTH -
- 23.
For Harward Artitechture is implemented in AVR’s so as to : [+1 0]
- A.
Improve Parallelism
- B.
Single Clock Execution
- C.
BOTH
- D.
None of the Above
Correct Answer
C. BOTH -
- 24.
Which of the following peripherals can be used for an multivibrator operation using an AVR [+1 0]
- A.
Timer 1
- B.
Timer 2
- C.
BOTH
- D.
None of these
Correct Answer
C. BOTH -
- 25.
Slow operation of Analog Comparator can be due to: [+1 0]
- A.
Settling process of Analog Comparator
- B.
Usage of Analog digital converter Channels
- C.
Device is powered on slow rising edge of Vcc
- D.
None of the Above
Correct Answer
C. Device is powered on slow rising edge of Vcc -
- 26.
During the enabling/disabling procedures of interrupts, the Interrupt vector change is : [+1 0]
- A.
Cleared
- B.
Unaffected
- C.
Set
- D.
N/A
Correct Answer
A. Cleared -
- 27.
How many clock period is required for the following instruction MOV R2,R1 [+1 0]
- A.
2
- B.
1
- C.
4
- D.
None of these
Correct Answer
A. 2 -
- 28.
Choose the instructions that affect the flag register of the processor [+1 0]
- A.
AAA,TEST,AND,PUSHF
- B.
IMUL,AND,POPF,PUSHF
- C.
POPF,PUSHF,STD,REP
- D.
POPF,INTO,TEST,STD
Correct Answer
D. POPF,INTO,TEST,STD -
- 29.
Which of the following is correct regarding DRAM? [+1 0]
- A.
The contents of the DRAM has to be refreshed periodically
- B.
Packing density is low
- C.
Information is stored as voltage level in a flip flop
- D.
Six to eight transistors are required to form one memory cell
Correct Answer
A. The contents of the DRAM has to be refreshed periodically -
- 30.
What is the main function of SBIC instruction? [+1 0]
- A.
It is used to clear a particular bit of a port
- B.
It is used to jump unconditionally
- C.
It is used to skip a instruction if particular bit of a port is zero
- D.
None of the above
Correct Answer
C. It is used to skip a instruction if particular bit of a port is zero -
- 31.
What is the advantage of using ARM 7 microcontroller?a.Has CISC archietectureb.It supports only high end communication protocolc.Has 16 bit thumb instructions and is a Open source developmentd.Has 64 bit ARM instructions [+1 0]
- A.
A,b
- B.
B,d
- C.
C,d
- D.
B,c
Correct Answer
B. B,d -
- 32.
Find the flags affected by the following instructions AAM,AAD [+1 0]
- A.
SF,ZF,CF
- B.
SF,ZF,PF
- C.
ZF,PF,CF
- D.
ZF,OF,PF
Correct Answer
D. ZF,OF,PF -
- 33.
The control word for setting up timer 2 in fast PWM mode with 8 bit resolution in Atmega 8 is ________.NOTE: Initialise other bits in normal mode [Negative Mark ] [+2 -1]
Correct Answer
TCCR2=0x4E ,TCCR2=0xCE - 34.
What are the Three Instructions will be used to find the 2's Complement of a data [+3 -3]way1________way 2________,________[The Instruction should write in Upper Case Letters]
Correct Answer
NEG
NOT,ADD
NOT,ADD - 35.
Fetch it and get the outputldi r22,0xEDldi r23,0xACadd r23,r22out ddrb,r23out portb,r22in r22,pinbThe output is ________. [3 0]
Correct Answer
11111101,11111111,111111x1 - 36.
What is the output for the below program [+3 0]inr22=0x________r23=0x________ r24=0x________r26=0x________ r27=0x________ldi r27,0x00ldi r26,0x60ldi r24,0x6fldi r22,0x0aldi r23,0x07l1:add r23,r24ST X+,r23dec r22cpi r22,0x00brne l1
Correct Answer
00
5d,5D
6f,6F
60
0a,0A - 37.
Analogy For LPM Instruction? [+1 0]
- A.
LDM
- B.
LDS
- C.
LD
- D.
SPM
Correct Answer(s)
B. LDS
C. LD -
- 38.
Flags affected by ASR? [+1 0]
- A.
Zero
- B.
Carry
- C.
Half Carry
- D.
Sign
Correct Answer(s)
A. Zero
B. Carry -
- 39.
In the process of enabling or disabling the interrupts : [+2 0]
- A.
Interrupt Vector change is enabled
- B.
The Interrupt vector change should be zero during the change
- C.
Interrupts are automatically disabled
- D.
None of the above
Correct Answer(s)
A. Interrupt Vector change is enabled
B. The Interrupt vector change should be zero during the change
C. Interrupts are automatically disabled -
- 40.
If a program never uses the interrupt sources,then: [+1 0]
- A.
Interrupt vectors in boot flash memory are flushed out
- B.
Regular program code replaces vector interrupt locations
- C.
Interrupt vectors are moved to the beginning of the flash memory
- D.
None of the Above
Correct Answer
B. Regular program code replaces vector interrupt locations -
- 41.
Find the delay generated by timer 0 in the following code [3 0] CLR P2.3 MOV TMOD,#01 HERE: MOV TL0,#2F MOV TH0,#0B8 SETB P2.3 SETB TR0 AGAIN: JNB TF0,AGAIN CLR TR0 CLR TF0 CLR P2.3
- A.
19
- B.
19.947
- C.
21
- D.
20.947
Correct Answer
B. 19.947 -
- 42.
Size of the ROM in 8051 [+1 0]
- A.
2K
- B.
4K
- C.
6K
- D.
8K
Correct Answer
B. 4K -
- 43.
Which bits of PSW are used for the CY and AC flag bits respectively? [+1 0]
- A.
7,6
- B.
6,5
- C.
4,3
- D.
0,1
Correct Answer
A. 7,6 -
- 44.
Consider a system consisting of a micro processor, memory, and peripheral devices connected by a common bus.During DMA data transfer , the microprocessor [+1 0]
- A.
Only reads from the bus
- B.
Only writes to the bus
- C.
Both reads from and writes to the bus
- D.
Neither reads from nor writes to the bus
Correct Answer
D. Neither reads from nor writes to the bus -
- 45.
If the following program is executed in a micro processor , the number of instrction cycles it will take from START TO HALT is: START MV1A,14 H : Move 14 H to register A SHIFT RLC : Rotate left without carry JNZ SHIFT HALT [+1 0]
- A.
Infinite
- B.
8
- C.
9
- D.
13
Correct Answer
A. Infinite -
- 46.
Four memory chips of size 32*4 are connected in parallel .The total capacity of the combination is? [+1 0]
- A.
128*4
- B.
32*16
- C.
32*8
- D.
256*2
Correct Answer
B. 32*16 -
- 47.
A memory system has a total of 8 memory chips,each with 12 address lines and 4 data lines.The total size of the memory system is________KB [+2 -1]
Correct Answer
64 - 48.
The 8255 PPI is used as described below:Case ( A) An A/D converter is interfaced to a microprocessor through an 8255.The conversion is initiated by a signal from the 8255 on port C . A signal on port C causes data to be strobed into Port A. Case (B) Two computers exchange data using a pair of 8255s.Port A works as a bi-directional data port supported by appropriate hand shaking signals. The appropriate modes of operation of the 8255 for case (A) and case(B) would be [+1 0]
- A.
Mode 2 for case (A) & Mode 1 for case (B)
- B.
Mode 2 for case (A) & Mode 0 for case (B)
- C.
Mode 1 for case (A) & Mode 0 for case (B)
- D.
Mode 0 for case (A) & Mode 1 for case (B)
Correct Answer
A. Mode 2 for case (A) & Mode 1 for case (B) -
- 49.
If the memory chip size is 512*1k bits then the number of chips required to make 1M byte of memory are [+1 0]
- A.
16
- B.
2
- C.
32
- D.
8
Correct Answer
A. 16 -
- 50.
In a microcomputer wait states are introduced make the processor [+1 0]
- A.
Wait during a DMA cycle
- B.
Interface slow peripherals
- C.
Wait during a power cycle
- D.
Power shutdown
Correct Answer
B. Interface slow peripherals -
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Feb 24, 2017Quiz Edited by
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Feb 04, 2017Quiz Created by
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